From 565e3f6814ed3e870c5bd87030e4d6eb6850219d Mon Sep 17 00:00:00 2001
From: SWalker <jswalker@ucsc.edu>
Date: Thu, 14 Sep 2023 21:27:47 -0700
Subject: [PATCH] flatten ptx in extraction and renumber test based on
 importance

---
 compiler/tests/05_rom_array_test.py | 43 +++++++++++++++++++++++++++++
 technology/gf180mcu/tech/tech.py    |  5 +++-
 2 files changed, 47 insertions(+), 1 deletion(-)
 create mode 100755 compiler/tests/05_rom_array_test.py

diff --git a/compiler/tests/05_rom_array_test.py b/compiler/tests/05_rom_array_test.py
new file mode 100755
index 00000000..80e188af
--- /dev/null
+++ b/compiler/tests/05_rom_array_test.py
@@ -0,0 +1,43 @@
+#!/usr/bin/env python3
+# See LICENSE for licensing information.
+#
+# Copyright (c) 2016-2023 Regents of the University of California and The Board
+# of Regents for the Oklahoma Agricultural and Mechanical College
+# (acting for and on behalf of Oklahoma State University)
+# All rights reserved.
+#
+import sys, os
+import unittest
+from testutils import *
+
+import openram
+from openram import debug
+from openram.sram_factory import factory
+from openram import OPTS
+
+
+class rom_array_test(openram_test):
+
+    def runTest(self):
+        config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME"))
+        openram.init_openram(config_file, is_unit_test=True)
+
+        debug.info(2, "Testing 4x4 array for rom cell")
+
+
+        # data = [[1, 0, 0, 1, 0, 0, 1, 1, 0], [0, 1, 0, 0, 1, 0, 1, 0, 0], [0, 0, 1, 0, 0, 0, 1, 0, 0], [0, 0, 0, 0, 1, 0, 0, 0, 1], [0, 1, 0, 0, 1, 1, 0, 0, 1], [0, 0, 0, 0, 0, 0, 0, 1, 0], [0, 0, 0, 1, 0, 0, 1, 0, 0], [1, 0, 0, 1, 0, 0, 0, 1, 0]]
+
+
+        data = [[1, 0, 0], [1, 1, 1], [0,1, 0]]
+        a = factory.create(module_type="rom_base_array", cols=3, rows=3, bitmap=data, strap_spacing=1, pitch_match=True)
+        self.local_check(a)
+        a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
+
+        openram.end_openram()
+
+# run the test from the command line
+if __name__ == "__main__":
+    (OPTS, args) = openram.parse_args()
+    del sys.argv[1:]
+    header(__file__, OPTS.tech_name)
+    unittest.main(testRunner=debugTestRunner())
diff --git a/technology/gf180mcu/tech/tech.py b/technology/gf180mcu/tech/tech.py
index 6aa1141b..fc34de2a 100644
--- a/technology/gf180mcu/tech/tech.py
+++ b/technology/gf180mcu/tech/tech.py
@@ -416,7 +416,7 @@ spice["pmos"] = "pfet_03v3"
 spice["power"]="vccd1"
 spice["ground"]="vssd1"
 
-spice["fet_libraries"] = {"TT": [[os.environ.get("SPICE_MODEL_DIR") + "/sky130.lib.spice", "tt"]]}
+spice["fet_libraries"] = {"TT": [[os.environ.get("SPICE_MODEL_DIR") + "/sm141064.ngspice", "typical"]]}
 
 # spice stimulus related variables
 spice["feasible_period"] = 10        # estimated feasible period in ns
@@ -477,4 +477,7 @@ drc_name = "magic"
 lvs_name = "netgen"
 pex_name = "magic"
 
+
+flatglob = ["*_?mos_m*"]
+
 ignore_drc_lvs_on = ["wl_strap"]