From 55814a8f74b43f3a7fe806da0718fd961f0929bb Mon Sep 17 00:00:00 2001
From: mrg <mrg@ucsc.edu>
Date: Wed, 12 Aug 2020 11:15:32 -0700
Subject: [PATCH] Fix syntax errors in pgates for super edits

---
 compiler/pgates/pgate.py           | 2 +-
 compiler/pgates/precharge.py       | 2 +-
 compiler/pgates/ptx.py             | 2 +-
 compiler/pgates/pwrite_driver.py   | 2 +-
 compiler/pgates/wordline_driver.py | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/compiler/pgates/pgate.py b/compiler/pgates/pgate.py
index 57d93e6f..082ef7b8 100644
--- a/compiler/pgates/pgate.py
+++ b/compiler/pgates/pgate.py
@@ -26,7 +26,7 @@ class pgate(design.design):
 
     def __init__(self, name, height=None, add_wells=True):
         """ Creates a generic cell """
-        super().__init__(, name)
+        super().__init__(name)
 
         if height:
             self.height = height
diff --git a/compiler/pgates/precharge.py b/compiler/pgates/precharge.py
index d948056d..aefdbb86 100644
--- a/compiler/pgates/precharge.py
+++ b/compiler/pgates/precharge.py
@@ -23,7 +23,7 @@ class precharge(design.design):
     def __init__(self, name, size=1, bitcell_bl="bl", bitcell_br="br"):
 
         debug.info(2, "creating precharge cell {0}".format(name))
-        super().__init__(, name)
+        super().__init__(name)
 
         self.bitcell = factory.create(module_type="bitcell")
         self.beta = parameter["beta"]
diff --git a/compiler/pgates/ptx.py b/compiler/pgates/ptx.py
index 6de86346..1e4393e7 100644
--- a/compiler/pgates/ptx.py
+++ b/compiler/pgates/ptx.py
@@ -75,7 +75,7 @@ class ptx(design.design):
         # replace periods with underscore for newer spice compatibility
         name = name.replace('.', '_')
         debug.info(3, "creating ptx {0}".format(name))
-        super().__init__(, name)
+        super().__init__(name)
 
         self.tx_type = tx_type
         self.mults = mults
diff --git a/compiler/pgates/pwrite_driver.py b/compiler/pgates/pwrite_driver.py
index 2d091fd0..6ae448f9 100644
--- a/compiler/pgates/pwrite_driver.py
+++ b/compiler/pgates/pwrite_driver.py
@@ -22,7 +22,7 @@ class pwrite_driver(design.design):
     def __init__(self, name, size=0):
         debug.error("pwrite_driver not implemented yet.", -1)
         debug.info(1, "creating pwrite_driver {}".format(name))
-        super().__init__(, name)
+        super().__init__(name)
         self.size = size
         self.beta = parameter["beta"]
         self.pmos_width = self.beta*self.size*parameter["min_tx_size"]
diff --git a/compiler/pgates/wordline_driver.py b/compiler/pgates/wordline_driver.py
index b8fa4631..a8ca76f8 100644
--- a/compiler/pgates/wordline_driver.py
+++ b/compiler/pgates/wordline_driver.py
@@ -21,7 +21,7 @@ class wordline_driver(design.design):
     def __init__(self, name, size=1, height=None):
         debug.info(1, "Creating wordline_driver {}".format(name))
         self.add_comment("size: {}".format(size))
-        super().__init__(, name)
+        super().__init__(name)
 
         if height is None:
             b = factory.create(module_type="bitcell")