From 4c40804b8fb6f9d1b13f2c76bbb4019c9360a24e Mon Sep 17 00:00:00 2001 From: jsowash Date: Tue, 3 Sep 2019 15:14:41 -0700 Subject: [PATCH] Moved via in write driver up for 2 port. --- compiler/sram/sram_1bank.py | 5 ++++- compiler/tests/20_psram_1bank_2mux_1rw_1w_wmask_test.py | 4 ++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/compiler/sram/sram_1bank.py b/compiler/sram/sram_1bank.py index 0ca465b8..9e578c7c 100644 --- a/compiler/sram/sram_1bank.py +++ b/compiler/sram/sram_1bank.py @@ -383,7 +383,10 @@ class sram_1bank(sram_base): bank_pins = [self.bank_inst.get_pin(x) for x in bank_names] if self.write_size: for x in bank_names: - pin_offset = self.bank_inst.get_pin(x).bc() + if port % 2: + pin_offset = self.bank_inst.get_pin(x).uc() + else: + pin_offset = self.bank_inst.get_pin(x).bc() self.add_via_center(layers=("metal1", "via1", "metal2"), offset=pin_offset) self.add_via_center(layers=("metal2", "via2", "metal3"), diff --git a/compiler/tests/20_psram_1bank_2mux_1rw_1w_wmask_test.py b/compiler/tests/20_psram_1bank_2mux_1rw_1w_wmask_test.py index 05a574b9..20fbd8e6 100755 --- a/compiler/tests/20_psram_1bank_2mux_1rw_1w_wmask_test.py +++ b/compiler/tests/20_psram_1bank_2mux_1rw_1w_wmask_test.py @@ -17,8 +17,8 @@ from sram_factory import factory import debug -# @unittest.skip("SKIPPING 20_psram_1bank_test, multiport layout not complete") -class psram_1bank_2mux_1rw_1w_test(openram_test): +# @unittest.skip("SKIPPING psram_1bank_2mux_1rw_1w_wmask_test, multiport layout not complete") +class psram_1bank_2mux_1rw_1w_wmask_test(openram_test): def runTest(self): globals.init_openram("config_{0}".format(OPTS.tech_name))