diff --git a/Makefile b/Makefile
index 3df8f7c8..8a04a599 100644
--- a/Makefile
+++ b/Makefile
@@ -3,9 +3,6 @@ include $(TOP_DIR)/openram.mk
 
 .DEFAULT_GOAL := install
 
-# Keep it locally if they didn't specify
-PDK_ROOT ?= $(TOP_DIR)
-
 # Skywater PDK SRAM library
 SRAM_LIB_DIR ?= $(PDK_ROOT)/sky130_fd_bd_sram
 SRAM_LIB_GIT_REPO ?= https://github.com/vlsida/sky130_fd_bd_sram.git
@@ -15,8 +12,8 @@ SRAM_LIB_GIT_COMMIT ?= 9d452eea52cde23f0a5b03e1c5ccf1ca27dd771a
 # Open PDKs
 OPEN_PDKS_DIR ?= $(PDK_ROOT)/open_pdks
 OPEN_PDKS_GIT_REPO ?= https://github.com/RTimothyEdwards/open_pdks.git
-#OPEN_PDKS_GIT_COMMIT ?= 1.0.156
-OPEN_PDKS_GIT_COMMIT ?= 7ea416610339d3c29af9d0d748ceadd3fd368608
+OPEN_PDKS_GIT_COMMIT ?= 1.0.311
+#OPEN_PDKS_GIT_COMMIT ?= 7ea416610339d3c29af9d0d748ceadd3fd368608
 SKY130_PDK ?= $(PDK_ROOT)/sky130A
 
 # Skywater PDK
diff --git a/compiler/modules/dff_array.py b/compiler/modules/dff_array.py
index 5cca38b6..c1fe54b1 100644
--- a/compiler/modules/dff_array.py
+++ b/compiler/modules/dff_array.py
@@ -119,12 +119,12 @@ class dff_array(design.design):
             # Add connections every 4 cells
             for col in range(0, self.columns, 4):
                 vdd_pin=self.dff_insts[0, col].get_pin("vdd")
-                self.add_power_pin("vdd", vdd_pin.lc())
+                self.add_power_pin("vdd", vdd_pin.lc(), start_layer=vdd_pin.layer)
 
             # Add connections every 4 cells
             for col in range(0, self.columns, 4):
                 gnd_pin=self.dff_insts[0, col].get_pin("gnd")
-                self.add_power_pin("gnd", gnd_pin.rc())
+                self.add_power_pin("gnd", gnd_pin.rc(), start_layer=vdd_pin.layer)
 
     def add_layout_pins(self):
         for row in range(self.rows):
diff --git a/compiler/modules/hierarchical_predecode.py b/compiler/modules/hierarchical_predecode.py
index 8ae3a08d..1431d75c 100644
--- a/compiler/modules/hierarchical_predecode.py
+++ b/compiler/modules/hierarchical_predecode.py
@@ -416,4 +416,4 @@ class hierarchical_predecode(design.design):
                         else:
                             xoffset = self.inv_inst[0].lx() - self.bus_space
                         pin_pos = vector(xoffset, and_pin.cy())
-                        self.add_power_pin(n, pin_pos)
+                        self.add_power_pin(n, pin_pos, start_layer=and_pin.layer)
diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py
index efa400c1..e18eeb53 100644
--- a/compiler/verify/magic.py
+++ b/compiler/verify/magic.py
@@ -95,6 +95,7 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa
     #f.write("gds polygon subcell true\n")
     f.write("gds warning default\n")
     # Flatten the transistors
+    # Bug in Netgen 1.5.194 when using this...
     f.write("gds flatglob *_?mos_m*\n")
     # These two options are temporarily disabled until Tim fixes a bug in magic related
     # to flattening channel routes and vias (hierarchy with no devices in it). Otherwise,
@@ -118,12 +119,13 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa
         pre = "#"
     else:
         pre = ""
-    if final_verification and OPTS.route_supplies:
-        f.write(pre + "extract unique all\n")
     # Hack to work around unit scales in SkyWater
     if OPTS.tech_name=="sky130":
         f.write(pre + "extract style ngspice(si)\n")
-    f.write(pre + "extract\n")
+    if final_verification and OPTS.route_supplies:
+        f.write(pre + "extract unique all\n")
+    else:
+        f.write(pre + "extract all\n")
     f.write(pre + "select top cell\n")
     f.write(pre + "feedback why\n")
     f.write('puts "Finished extract"\n')
diff --git a/docker/Dockerfile b/docker/Dockerfile
index 43dec418..11a7546e 100644
--- a/docker/Dockerfile
+++ b/docker/Dockerfile
@@ -111,8 +111,7 @@ RUN ./autogen.sh \
 RUN rm -rf /root/ngspice
 
 ### Netgen ###
-#ARG NETGEN_COMMIT=1.5.219
-#ARG NETGEN_COMMIT=88d53fab15eb611cffc024eebf8743fae5cf8cb7
+#ARG NETGEN_COMMIT=1.5.195
 ARG NETGEN_COMMIT=1.5.221
 WORKDIR /root
 #RUN git clone https://github.com/RTimothyEdwards/netgen.git netgen
@@ -129,8 +128,9 @@ RUN apt-get install --no-install-recommends -y iverilog
 
 ### Magic ###
 #ARG MAGIC_COMMIT=db4fa65bfc096e63954b37b188ea27b90ab31839
-#ARG MAGIC_COMMIT=8.3.211
-ARG MAGIC_COMMIT=8.3.309
+#ARG MAGIC_COMMIT=8.3.274
+#ARG MAGIC_COMMIT=8.3.310
+ARG MAGIC_COMMIT=d099562e85e16654ef4573f1eb26c89d1b3d1ee2
 WORKDIR /root
 #RUN git clone https://github.com/RTimothyEdwards/magic.git magic
 RUN git clone git://opencircuitdesign.com/magic magic
diff --git a/openram.mk b/openram.mk
index 02a9ee12..d03055b1 100644
--- a/openram.mk
+++ b/openram.mk
@@ -1,11 +1,18 @@
 OPENRAM_HOME := $(abspath $(TOP_DIR)/compiler)
 OPENRAM_TECH := $(abspath $(TOP_DIR)/technology)
 OPENRAM_COMPILER := $(OPENRAM_HOME)/openram.py
+
+PDK_ROOT = $(TOP_DIR)
+
 ifeq (,$(wildcard $(OPENRAM_COMPILER)))
 $(error Did not find '$(OPENRAM_COMPILER)' in '$(OPENRAM_HOME)' (from $$OPENRAM_HOME))
 endif
 export OPENRAM_HOME
 export OPENRAM_TECH
+export PDK_ROOT
+#$(info Using OPENRAM_HOME=$(OPENRAM_HOME))
+#$(info Using OPENRAM_TECH=$(OPENRAM_TECH))
+#$(info Using PDK_ROOT=$(PDK_ROOT))
 
 UID = $(shell id -u)
 GID = $(shell id -g)