diff --git a/compiler/tests/23_lib_sram_test.py b/compiler/tests/23_lib_sram_test.py
index 037a1d65..07b9f927 100644
--- a/compiler/tests/23_lib_sram_test.py
+++ b/compiler/tests/23_lib_sram_test.py
@@ -32,13 +32,11 @@ class lib_test(unittest.TestCase):
                       name="sram_2_16_1_{0}".format(OPTS.tech_name))
         OPTS.check_lvsdrc = True
 
-
         tempspice = OPTS.openram_temp + "temp.sp"
         s.sp_write(tempspice)
 
-        curpath=os.path.dirname(os.path.realpath(__file__)) + "/"
         filename = s.name + ".lib"        
-        libname = curpath + filename
+        libname = OPTS.openram_temp + filename
         lib.lib(libname,s,tempspice)
         
         # let's diff the result with a golden model
diff --git a/compiler/tests/24_lef_sram_test.py b/compiler/tests/24_lef_sram_test.py
index 3c4e2b81..5c08d72e 100644
--- a/compiler/tests/24_lef_sram_test.py
+++ b/compiler/tests/24_lef_sram_test.py
@@ -32,11 +32,10 @@ class lef_test(unittest.TestCase):
 
         OPTS.check_lvsdrc = True
 
-        curpath=os.path.dirname(os.path.realpath(__file__)) + "/"
         gdsfile = s.name + ".gds"
         leffile = s.name + ".lef"
-        gdsname = curpath + gdsfile
-        lefname = curpath + leffile
+        gdsname = OPTS.openram_temp + gdsfile
+        lefname = OPTS.openram_temp + leffile
         s.gds_write(gdsname)
         lef.lef(gdsname,lefname,s)
 
diff --git a/compiler/tests/25_verilog_sram_test.py b/compiler/tests/25_verilog_sram_test.py
index 66abfa47..cf042089 100644
--- a/compiler/tests/25_verilog_sram_test.py
+++ b/compiler/tests/25_verilog_sram_test.py
@@ -32,9 +32,8 @@ class verilog_test(unittest.TestCase):
 
         OPTS.check_lvsdrc = True
 
-        curpath=os.path.dirname(os.path.realpath(__file__)) + "/"
         vfile = s.name + ".v"
-        vname = curpath + vfile
+        vname = OPTS.openram_temp + vfile
         verilog.verilog(vname,s)