diff --git a/compiler/pgates/pnand2.py b/compiler/pgates/pnand2.py
index 3a9e2db7..c3e9a515 100644
--- a/compiler/pgates/pnand2.py
+++ b/compiler/pgates/pnand2.py
@@ -12,6 +12,7 @@ from globals import OPTS
 from vector import vector
 import logical_effort
 from sram_factory import factory
+import contact
 
 
 class pnand2(pgate.pgate):
@@ -177,11 +178,26 @@ class pnand2(pgate.pgate):
 
 
         # Top of NMOS drain
-        bottom_pin = self.nmos2_inst.get_pin("D")
-        self.inputA_yoffset = max(bottom_pin.uy() + self.m1_pitch,
-                                  self.nmos2_inst.uy() + self.poly_to_active)
-
-        self.inputB_yoffset = self.inputA_yoffset + self.m3_pitch
+        bottom_pin = self.nmos1_inst.get_pin("D")
+        # active contact metal to poly contact metal spacing
+        active_contact_to_poly_contact = bottom_pin.uy() + self.m1_space + 0.5 * contact.poly_contact.second_layer_height
+        # active diffusion to poly contact spacing
+        # doesn't use nmos uy because that is calculated using offset + poly height
+        active_top = self.nmos1_inst.by() + self.nmos1_inst.mod.active_height
+        active_to_poly_contact = active_top + self.poly_to_active + 0.5 * contact.poly_contact.first_layer_height
+        active_to_poly_contact2 = active_top + drc("contact_to_gate") + 0.5 * self.route_layer_width
+        self.inputA_yoffset = max(active_contact_to_poly_contact,
+                                  active_to_poly_contact,
+                                  active_to_poly_contact2)
+        
+        self.route_input_gate(self.pmos1_inst,
+                              self.nmos1_inst,
+                              self.inputA_yoffset,
+                              "A",
+                              position="center")
+        
+        # self.inputB_yoffset = self.inputA_yoffset + self.m3_pitch
+        self.inputB_yoffset = self.output_yoffset - self.route_layer_pitch
 
         # This will help with the wells and the input/output placement
         self.route_input_gate(self.pmos2_inst,
@@ -189,19 +205,13 @@ class pnand2(pgate.pgate):
                               self.inputB_yoffset,
                               "B",
                               position="center")
-        
-        self.route_input_gate(self.pmos1_inst,
-                              self.nmos1_inst,
-                              self.inputA_yoffset,
-                              "A",
-                              position="center")
 
     def route_output(self):
         """ Route the Z output """
         
         # One routing track layer below the PMOS contacts
         route_layer_offset = 0.5 * self.route_layer_width + self.route_layer_space
-        output_yoffset = self.pmos1_inst.get_pin("D").by() - route_layer_offset
+        self.output_yoffset = self.pmos1_inst.get_pin("D").by() - route_layer_offset
 
 
         # PMOS1 drain
@@ -213,7 +223,7 @@ class pnand2(pgate.pgate):
         
         # Output pin
         out_offset = vector(nmos_pin.cx() + self.route_layer_pitch,
-                            output_yoffset)
+                            self.output_yoffset)
 
         # This routes on M2
         # # Midpoints of the L routes go horizontal first then vertical