From 3a06141030c2f247d8184cef1db3955d16fbf01f Mon Sep 17 00:00:00 2001
From: Jesse Cirimelli-Low <jcirimel@ucsc.edu>
Date: Thu, 6 Feb 2020 12:10:49 +0000
Subject: [PATCH] add simple sram sizing for netlist only

---
 compiler/base/utils.py       | 13 +++++++++----
 compiler/modules/bank.py     |  1 +
 compiler/sram/sram_config.py | 15 +++++++++++++--
 3 files changed, 23 insertions(+), 6 deletions(-)

diff --git a/compiler/base/utils.py b/compiler/base/utils.py
index f02b2b85..16fbc51f 100644
--- a/compiler/base/utils.py
+++ b/compiler/base/utils.py
@@ -96,8 +96,10 @@ def get_libcell_size(name, units, lpp):
     Open a GDS file and return the library cell size from either the
     bounding box or a border layer.
     """
-    cell_gds = OPTS.openram_tech + "gds_lib/" + str(name) + ".gds"
-    return(get_gds_size(name, cell_gds, units, lpp))
+    if not OPTS.netlist_only:
+        cell_gds = OPTS.openram_tech + "gds_lib/" + str(name) + ".gds"
+        return(get_gds_size(name, cell_gds, units, lpp))
+    return (0,0,)
 
 
 def get_gds_pins(pin_names, name, gds_filename, units):
@@ -128,8 +130,11 @@ def get_libcell_pins(pin_list, name, units):
     Open a GDS file and find the pins in pin_list as text on a given layer.
     Return these as a rectangle layer pair for each pin.
     """
-    cell_gds = OPTS.openram_tech + "gds_lib/" + str(name) + ".gds"
-    return(get_gds_pins(pin_list, name, cell_gds, units))
+    if not OPTS.netlist_only:
+        cell_gds = OPTS.openram_tech + "gds_lib/" + str(name) + ".gds"
+        return(get_gds_pins(pin_list, name, cell_gds, units))
+    else:
+        return
 
 
 
diff --git a/compiler/modules/bank.py b/compiler/modules/bank.py
index 7ed0c9a3..4a674c23 100644
--- a/compiler/modules/bank.py
+++ b/compiler/modules/bank.py
@@ -57,6 +57,7 @@ class bank(design.design):
 
 
     def create_netlist(self):
+
         self.compute_sizes()
         self.add_modules()
         self.add_pins() # Must create the replica bitcell array first
diff --git a/compiler/sram/sram_config.py b/compiler/sram/sram_config.py
index 376bf42b..c086a57a 100644
--- a/compiler/sram/sram_config.py
+++ b/compiler/sram/sram_config.py
@@ -23,9 +23,12 @@ class sram_config:
         # This will get over-written when we determine the organization
         self.words_per_row = words_per_row
 
+        if not OPTS.netlist_only:
+            self.compute_sizes()
+        else:
+            self.compute_simple_sram_sizes()
 
-        self.compute_sizes()
-
+        
 
     def set_local_config(self, module):
         """ Copy all of the member variables to the given module for convenience """
@@ -35,6 +38,14 @@ class sram_config:
         # Copy all the variables to the local module
         for member in members:
             setattr(module,member,getattr(self,member))
+    def compute_simple_sram_sizes(self):
+        self.row_addr_size = int(log(OPTS.num_words, 2))
+        self.col_addr_size = int(log(OPTS.word_size, 2))
+        self.words_per_row = 1
+        self.num_rows = OPTS.num_words
+        self.num_cols = OPTS.word_size
+        self.bank_addr_size = self.col_addr_size + self.row_addr_size
+        self.addr_size = self.bank_addr_size + int(log(self.num_banks, 2))
 
     def compute_sizes(self):
         """  Computes the organization of the memory using bitcell size by trying to make it square."""