From 38a8c46034cd5b7052c98f4b9e6626228f9943c5 Mon Sep 17 00:00:00 2001
From: Matt Guthaus <mrg@ucsc.edu>
Date: Sat, 20 Oct 2018 14:47:24 -0700
Subject: [PATCH] Change non-preferred route costs.

---
 compiler/router/signal_router.py | 2 --
 compiler/router/supply_router.py | 9 +++++++--
 compiler/verify/magic.py         | 2 +-
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/compiler/router/signal_router.py b/compiler/router/signal_router.py
index 0f65b2ca..eb706b5b 100644
--- a/compiler/router/signal_router.py
+++ b/compiler/router/signal_router.py
@@ -4,8 +4,6 @@ from contact import contact
 import math
 import debug
 from pin_layout import pin_layout
-from vector import vector
-from vector3d import vector3d 
 from globals import OPTS
 from router import router
 
diff --git a/compiler/router/supply_router.py b/compiler/router/supply_router.py
index 53e85ef0..dd9c3fd1 100644
--- a/compiler/router/supply_router.py
+++ b/compiler/router/supply_router.py
@@ -5,10 +5,10 @@ import math
 import debug
 from globals import OPTS
 from pin_layout import pin_layout
-from vector import vector
 from vector3d import vector3d 
 from router import router
 from direction import direction
+import grid
 import grid_utils
 
 class supply_router(router):
@@ -23,7 +23,12 @@ class supply_router(router):
         either the gds file name or the design itself (by saving to a gds file).
         """
         router.__init__(self, layers, design, gds_filename)
-        
+
+        # We over-ride the regular router costs to allow
+        # more off-direction router in the supply grid
+        grid.VIA_COST = 1
+        grid.NONPREFERRED_COST = 1
+        grid.PREFERRED_COST = 1
 
         # The list of supply rails (grid sets) that may be routed
         self.supply_rails = {}
diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py
index 9e020705..0df7fe24 100644
--- a/compiler/verify/magic.py
+++ b/compiler/verify/magic.py
@@ -106,7 +106,7 @@ def write_netgen_script(cell_name, sp_name):
     f.write("equate class {{pfet {0}.spice}} {{p {1}}}\n".format(cell_name, sp_name))
     # This circuit has symmetries and needs to be flattened to resolve them or the banks won't pass
     # Is there a more elegant way to add this when needed?
-    f.write("flatten class {{{0}.spice bitcell_array}}\n".format(cell_name))    
+    f.write("flatten class {{{0}.spice bitcell_array}}\n".format(cell_name))
     f.write("flatten class {{{0}.spice precharge_array_1}}\n".format(cell_name))
     f.write("flatten class {{{0}.spice precharge_array_2}}\n".format(cell_name))
     f.write("flatten class {{{0}.spice precharge_array_3}}\n".format(cell_name))