diff --git a/compiler/tests/05_pbitcell_array_test.py b/compiler/tests/05_pbitcell_array_test.py
index 058548c8..2dfed383 100755
--- a/compiler/tests/05_pbitcell_array_test.py
+++ b/compiler/tests/05_pbitcell_array_test.py
@@ -41,6 +41,7 @@ class array_multiport_test(openram_test):
         self.local_check(a)
         
 
+        OPTS.bitcell = "bitcell"
         OPTS.check_lvsdrc = True
         globals.end_openram()