From 3062aba214a44a834c80a55a80056ecd2dd78659 Mon Sep 17 00:00:00 2001 From: mrg Date: Wed, 9 Sep 2020 13:03:05 -0700 Subject: [PATCH] Fix update to exclude bits with RBLs --- compiler/modules/replica_bitcell_array.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/modules/replica_bitcell_array.py b/compiler/modules/replica_bitcell_array.py index 0091c20b..7d4814fe 100644 --- a/compiler/modules/replica_bitcell_array.py +++ b/compiler/modules/replica_bitcell_array.py @@ -501,7 +501,7 @@ class replica_bitcell_array(bitcell_base_array.bitcell_base_array): def graph_exclude_replica_col_bits(self): """Exclude all replica/dummy cells in the replica columns except the replica bit.""" - for port in range(self.left_rbl + self.right_rbl): + for port in self.left_rbl + self.right_rbl: self.replica_columns[port].exclude_all_but_replica() def get_cell_name(self, inst_name, row, col):