From 2e846cb22f63319bee4a7c31576ef78f72cdcab0 Mon Sep 17 00:00:00 2001 From: mrg Date: Mon, 27 Sep 2021 15:21:26 -0700 Subject: [PATCH] Fix regexes for cells without well taps --- technology/freepdk45/tech/freepdk45.lylvs | 2 +- technology/scn4m_subm/tech/scn4m_subm.lylvs | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/technology/freepdk45/tech/freepdk45.lylvs b/technology/freepdk45/tech/freepdk45.lylvs index 91009968..bf4852d8 100644 --- a/technology/freepdk45/tech/freepdk45.lylvs +++ b/technology/freepdk45/tech/freepdk45.lylvs @@ -214,7 +214,7 @@ end #connect_global(nwell, "NWELL") #connect_global(bulk, "BULK") -for pat in %w(pnand* and?_dec port_address* replica_bitcell_array) +for pat in %w(pinv* pnor* pnand* and?_dec* port_address* replica_bitcell_array*) connect_explicit(pat, [ "NWELL", "vdd" ]) connect_explicit(pat, [ "BULK", "PWELL", "gnd" ]) end diff --git a/technology/scn4m_subm/tech/scn4m_subm.lylvs b/technology/scn4m_subm/tech/scn4m_subm.lylvs index 46a6c12a..4421d627 100644 --- a/technology/scn4m_subm/tech/scn4m_subm.lylvs +++ b/technology/scn4m_subm/tech/scn4m_subm.lylvs @@ -164,7 +164,7 @@ connect_global(pwell, "PWELL") connect_global(nwell, "NWELL") #connect_global(bulk, "BULK") -for pat in %w(pnand* and?_dec port_address* replica_bitcell_array) +for pat in %w(pinv* pnor* pnand* and?_dec* port_address* replica_bitcell_array*) connect_explicit(pat, [ "NWELL", "vdd" ]) connect_explicit(pat, [ "BULK", "PWELL", "gnd" ]) end