diff --git a/.coveragerc b/.coveragerc
new file mode 100644
index 00000000..5a8c6f66
--- /dev/null
+++ b/.coveragerc
@@ -0,0 +1,14 @@
+[run]
+omit =
+ # omit anything in a .local directory anywhere
+ */.local/*
+ # omit everything in /usr
+ /usr/*
+[paths]
+source =
+ /home/gitlab-runner/builds/2fd64746/0
+ /home/gitlab-runner/builds/2fd64746/1
+ /home/gitlab-runner/builds/2fd64746/2
+ /home/gitlab-runner/builds/2fd64746/3
+ /home/gitlab-runner/builds/2fd64746/4
+ /home/gitlab-runner/builds/2fd64746/5
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 96e30d2d..27c341aa 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,6 +1,39 @@
+before_script:
+ - . /home/gitlab-runner/setup-paths.sh
+ - export OPENRAM_HOME="`pwd`/compiler"
+ - export OPENRAM_TECH="`pwd`/technology"
+
+stages:
+ - test
+ - coverage
+
freepdk45:
- script: "/home/gitlab-runner/regress_freepdk45.sh"
+ stage: test
+ script:
+ - coverage run -p $OPENRAM_HOME/tests/regress.py -t freepdk45
+ artifacts:
+ paths:
+ - .coverage.*
+ expire_in: 1 week
scn4m_subm:
- script: "/home/gitlab-runner/regress_scn4m_subm.sh"
+ stage: test
+ script:
+ - coverage run -p $OPENRAM_HOME/tests/regress.py -t scn4m_subm
+ artifacts:
+ paths:
+ - .coverage.*
+ expire_in: 1 week
+
+coverage:
+ stage: coverage
+ script:
+ - coverage combine
+ - coverage report
+ - coverage html -d coverage_html
+ artifacts:
+ paths:
+ - coverage_html
+ expire_in: 1 week
+ coverage: '/TOTAL.+ ([0-9]{1,3}%)/'
diff --git a/README.md b/README.md
index c212167e..44650183 100644
--- a/README.md
+++ b/README.md
@@ -1,9 +1,18 @@
# OpenRAM
-Master: [](https://github.com/VLSIDA/OpenRAM/commits/master)
-Dev: [](https://github.com/VLSIDA/OpenRAM/commits/dev)
-[](https://github.com/VLSIDA/OpenRAM/archive/master.zip)
+
+[](https://www.python.org/)
[](./LICENSE)
+Master:
+[](https://github.com/VLSIDA/OpenRAM/commits/master)
+
+[](https://github.com/VLSIDA/OpenRAM/archive/master.zip)
+
+Dev:
+[](https://github.com/VLSIDA/OpenRAM/commits/dev)
+
+[](https://github.com/VLSIDA/OpenRAM/archive/dev.zip)
+
An open-source static random access memory (SRAM) compiler.
# What is OpenRAM?
@@ -39,6 +48,12 @@ For example add this to your .bashrc:
export OPENRAM_TECH="$HOME/openram/technology"
```
+You may also wish to add OPENRAM\_HOME to your PYTHONPATH:
+
+```
+ export PYTHONPATH="$PYTHONPATH:$OPENRAM_HOME"
+```
+
We include the tech files necessary for [FreePDK45] and [SCMOS]
SCN4M_SUBM. The [SCMOS] spice models, however, are generic and should
be replaced with foundry models. If you are using [FreePDK45], you
@@ -56,8 +71,7 @@ We have included the most recent SCN4M_SUBM design rules from [Qflow].
# Basic Usage
Once you have defined the environment, you can run OpenRAM from the command line
-using a single configuration file written in Python. You may wish to add
-$OPENRAM\_HOME to your $PYTHONPATH.
+using a single configuration file written in Python.
For example, create a file called *myconfig.py* specifying the following
parameters for your memory:
@@ -68,7 +82,7 @@ word_size = 2
# Number of words in the memory
num_words = 16
-# Technology to use in $OPENRAM\_TECH
+# Technology to use in $OPENRAM_TECH
tech_name = "scn4m_subm"
# Process corners to characterize
process_corners = ["TT"]
@@ -88,7 +102,7 @@ output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
You can then run OpenRAM by executing:
```
-python3 $OPENRAM\_HOME/openram.py myconfig
+python3 $OPENRAM_HOME/openram.py myconfig
```
You can see all of the options for the configuration file in
$OPENRAM\_HOME/options.py
@@ -176,7 +190,7 @@ OpenRAM is licensed under the [BSD 3-clause License](./LICENSE).
- [Matthew Guthaus] from [VLSIDA] created the OpenRAM project and is the lead architect.
- [James Stine] from [VLSIARCH] co-founded the project.
- Hunter Nichols maintains and updates the timing characterization.
-- Michael Grims created and maintains the multiport netlist code.
+- Michael Grimes created and maintains the multiport netlist code.
- Jennifer Sowash is creating the OpenRAM IP library.
- Jesse Cirimelli-Low created the datasheet generation.
- Samira Ataei created early multi-bank layouts and control logic.
@@ -185,6 +199,8 @@ OpenRAM is licensed under the [BSD 3-clause License](./LICENSE).
- Brian Chen created early prototypes of the timing characterizer.
- Jeff Butera created early prototypes of the bank layout.
+If I forgot to add you, please let me know!
+
* * *
[Matthew Guthaus]: https://users.soe.ucsc.edu/~mrg
@@ -193,9 +209,9 @@ OpenRAM is licensed under the [BSD 3-clause License](./LICENSE).
[VLSIARCH]: https://vlsiarch.ecen.okstate.edu/
[OpenRAMpaper]: https://ieeexplore.ieee.org/document/7827670/
-[Github issues]: https://github.com/OpenRAM/OpenRAM/issues
-[Github pull request]: https://github.com/OpenRAM/OpenRAM/pulls
-[Github projects]: https://github.com/OpenRAM/OpenRAM/projects
+[Github issues]: https://github.com/VLSIDA/OpenRAM/issues
+[Github pull request]: https://github.com/VLSIDA/OpenRAM/pulls
+[Github projects]: https://github.com/VLSIDA/OpenRAM/projects
[email me]: mailto:mrg+openram@ucsc.edu
[dev-group]: mailto:openram-dev-group@ucsc.edu
diff --git a/images/Python-3.5-green.svg b/images/Python-3.5-green.svg
new file mode 100644
index 00000000..5856e0ee
--- /dev/null
+++ b/images/Python-3.5-green.svg
@@ -0,0 +1 @@
+
\ No newline at end of file
diff --git a/images/download-stable-blue.svg b/images/download-stable-blue.svg
new file mode 100644
index 00000000..2fbc3649
--- /dev/null
+++ b/images/download-stable-blue.svg
@@ -0,0 +1 @@
+
\ No newline at end of file
diff --git a/images/download-unstable-blue.svg b/images/download-unstable-blue.svg
new file mode 100644
index 00000000..a233df6b
--- /dev/null
+++ b/images/download-unstable-blue.svg
@@ -0,0 +1 @@
+
\ No newline at end of file