diff --git a/compiler/base/hierarchy_layout.py b/compiler/base/hierarchy_layout.py
index 86cf6e43..ce9c5407 100644
--- a/compiler/base/hierarchy_layout.py
+++ b/compiler/base/hierarchy_layout.py
@@ -631,10 +631,11 @@ class layout():
         """
         return self.pins
 
-    def copy_layout_pin(self, instance, pin_name, new_name=""):
+    def copy_layout_pin(self, instance, pin_name, new_name="", relative_offset=vector(0, 0)):
         """
         Create a copied version of the layout pin at the current level.
         You can optionally rename the pin to a new name.
+        You can optionally add an offset vector by which to move the pin.
         """
         pins = instance.get_pins(pin_name)
 
@@ -646,7 +647,7 @@ class layout():
                 new_name = pin_name
             self.add_layout_pin(new_name,
                                 pin.layer,
-                                pin.ll(),
+                                pin.ll() + relative_offset,
                                 pin.width(),
                                 pin.height())
 
diff --git a/compiler/modules/capped_bitcell_array.py b/compiler/modules/capped_bitcell_array.py
index 1751fd71..cee1885b 100644
--- a/compiler/modules/capped_bitcell_array.py
+++ b/compiler/modules/capped_bitcell_array.py
@@ -307,7 +307,15 @@ class capped_bitcell_array(bitcell_base_array):
         for pin_name in self.replica_bitcell_array.get_pin_names():
             if pin_name in excluded_pins:
                 continue
-            self.copy_layout_pin(self.replica_bitcell_array_inst, pin_name)
+            # move pins to edges of cap cells
+            if "wl" in pin_name:
+                pin_offset = self.bitcell_offset.scale(-1, 0)
+            else:
+                pin_offset = self.bitcell_offset.scale(0, -1)
+
+            self.copy_layout_pin(instance=self.replica_bitcell_array_inst,
+                                 pin_name=pin_name,
+                                 relative_offset=pin_offset)
 
     def route_supplies(self):