From 2468f224d99af6d06bbe75bd2fe6903480de4091 Mon Sep 17 00:00:00 2001
From: Matt Guthaus <mrg@ucsc.edu>
Date: Mon, 22 Jan 2018 17:14:39 -0800
Subject: [PATCH] SCMOS library cells passing LVS (with property errors
 though). Permute must be enabled before compare, duh.

---
 compiler/tests/01_library_drc_test.py         |   2 +-
 compiler/tests/02_library_lvs_test.py         |   2 +-
 compiler/verify/magic.py                      |   2 +-
 .../scn3me_subm/gds_lib/write_driver.gds      | Bin 12132 -> 12134 bytes
 .../scn3me_subm/mag_lib/write_driver.mag      |   4 ++--
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/compiler/tests/01_library_drc_test.py b/compiler/tests/01_library_drc_test.py
index 17bab121..a83c5a38 100644
--- a/compiler/tests/01_library_drc_test.py
+++ b/compiler/tests/01_library_drc_test.py
@@ -26,7 +26,7 @@ class library_drc_test(unittest.TestCase):
                 drc_errors += 1
                 debug.error("Missing GDS file: {}".format(gds_name))
             drc_errors += verify.run_drc(name, gds_name)
-            self.assertEqual(drc_errors, 0)
+
         # fails if there are any DRC errors on any cells
         self.assertEqual(drc_errors, 0)
         globals.end_openram()
diff --git a/compiler/tests/02_library_lvs_test.py b/compiler/tests/02_library_lvs_test.py
index b9da29a1..caa13e42 100644
--- a/compiler/tests/02_library_lvs_test.py
+++ b/compiler/tests/02_library_lvs_test.py
@@ -28,7 +28,7 @@ class library_lvs_test(unittest.TestCase):
                 lvs_errors += 1
                 debug.error("Missing SPICE file {}".format(gds_name))
             lvs_errors += verify.run_lvs(f, gds_name, sp_name)
-
+            self.assertEqual(lvs_errors, 0)
         # fail if the error count is not zero
         self.assertEqual(lvs_errors, 0)
         globals.end_openram()
diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py
index 7299f188..475e4558 100644
--- a/compiler/verify/magic.py
+++ b/compiler/verify/magic.py
@@ -116,10 +116,10 @@ def write_netgen_script(cell_name, sp_name):
     #f.write("lvs {0}.spice {{{1} {0}}}\n".format(cell_name, sp_name))
     f.write("log file lvs.results\n")
     f.write("log start\n")    
+    f.write("permute default\n")
     f.write("compare hierarchical {0}{1}.spice {{{2} {1}}}\n".format(OPTS.openram_temp,
                                                                      cell_name,
                                                                      sp_name))
-    f.write("permute\n")
     f.write("run converge\n")
     f.write("log end\n")    
     f.write("quit\n")
diff --git a/technology/scn3me_subm/gds_lib/write_driver.gds b/technology/scn3me_subm/gds_lib/write_driver.gds
index 5dd8d038b3d4587c24fd9128b1fbd925bbc2f28c..6cc852914b2da8afdfea24c32e7ae65fc136a1db 100644
GIT binary patch
delta 97
zcmaD7_bg6{fsKKQftf*uk%^&<fssLsL4ZM%K^2LuJyFS!A5Cau(mcJ%YWfzFU+9TQ
cG3qcdNOv)CNV1iu<}om^2m&!X5VJ4<0MHH&A^-pY

delta 85
zcmaDB_ash<fsKKQftf*uk%^&<fssLsL4ZM$fftD_I#J1xA5Cau(mXv5sV@v{l5DAY
TlXvOKP13huV`pGsVPOCO3J(m~

diff --git a/technology/scn3me_subm/mag_lib/write_driver.mag b/technology/scn3me_subm/mag_lib/write_driver.mag
index 86edb620..1fbc4743 100644
--- a/technology/scn3me_subm/mag_lib/write_driver.mag
+++ b/technology/scn3me_subm/mag_lib/write_driver.mag
@@ -1,6 +1,6 @@
 magic
 tech scmos
-timestamp 1516667113
+timestamp 1516668097
 << nwell >>
 rect -3 100 37 137
 rect -3 -1 37 50
@@ -230,7 +230,7 @@ rect 0 0 34 201
 rlabel metal2 20 201 20 201 5 BR
 rlabel metal2 10 201 10 201 5 BL
 rlabel metal1 0 30 0 30 1 vdd
-rlabel metal1 0 23 0 23 3 en
 rlabel metal1 0 16 0 16 7 gnd
 rlabel metal2 15 0 15 0 1 din
+rlabel metal1 0 23 2 24 3 wen
 << end >>