diff --git a/compiler/tests/14_replica_bitline_test.py b/compiler/tests/14_replica_bitline_test.py
index d54878d7..36dd63e9 100644
--- a/compiler/tests/14_replica_bitline_test.py
+++ b/compiler/tests/14_replica_bitline_test.py
@@ -21,10 +21,18 @@ class replica_bitline_test(openram_test):
 
         import replica_bitline
 
-        debug.info(2, "Testing RBL")
-        a = replica_bitline.replica_bitline(13)
+        stages=4
+        rows=13
+        debug.info(2, "Testing RBL with {0} FO4 stages, {1} rows".format(stages,rows))
+        a = replica_bitline.replica_bitline(stages,rows)
         self.local_check(a)
 
+        stages=8
+        rows=100
+        debug.info(2, "Testing RBL with {0} FO4 stages, {1} rows".format(stages,rows))
+        a = replica_bitline.replica_bitline(stages,rows)
+        self.local_check(a)
+        
         OPTS.check_lvsdrc = True
         globals.end_openram()