diff --git a/compiler/tests/config_freepdk45_back_end.py b/compiler/tests/config_freepdk45_back_end.py index f30a5658..68417a3b 100644 --- a/compiler/tests/config_freepdk45_back_end.py +++ b/compiler/tests/config_freepdk45_back_end.py @@ -16,5 +16,5 @@ temperatures = [25] inline_lvsdrc = True route_supplies = True check_lvsdrc = True - +analytical_delay = False diff --git a/compiler/tests/config_freepdk45_front_end.py b/compiler/tests/config_freepdk45_front_end.py index 309a47eb..1886d808 100644 --- a/compiler/tests/config_freepdk45_front_end.py +++ b/compiler/tests/config_freepdk45_front_end.py @@ -13,6 +13,6 @@ process_corners = ["TT"] supply_voltages = [1.0] temperatures = [25] - +analytical_delay = False diff --git a/compiler/tests/config_scn3me_subm_back_end.py b/compiler/tests/config_scn3me_subm_back_end.py index 826a50ae..f9c23417 100644 --- a/compiler/tests/config_scn3me_subm_back_end.py +++ b/compiler/tests/config_scn3me_subm_back_end.py @@ -16,6 +16,7 @@ temperatures = [25] route_supplies = True check_lvsdrc = True inline_lvsdrc = True +analytical_delay = False drc_name = "magic" lvs_name = "netgen" diff --git a/compiler/tests/config_scn3me_subm_front_end.py b/compiler/tests/config_scn3me_subm_front_end.py index c73fc84e..40504a18 100644 --- a/compiler/tests/config_scn3me_subm_front_end.py +++ b/compiler/tests/config_scn3me_subm_front_end.py @@ -13,6 +13,8 @@ process_corners = ["TT"] supply_voltages = [5.0] temperatures = [25] +analytical_delay = False + drc_name = "magic" lvs_name = "netgen" pex_name = "magic" diff --git a/compiler/tests/config_scn4m_subm_back_end.py b/compiler/tests/config_scn4m_subm_back_end.py index 09d7a087..35e4cd91 100644 --- a/compiler/tests/config_scn4m_subm_back_end.py +++ b/compiler/tests/config_scn4m_subm_back_end.py @@ -16,6 +16,7 @@ temperatures = [25] route_supplies = True check_lvsdrc = True inline_lvsdrc = True +analytical_delay = False drc_name = "magic" lvs_name = "netgen" diff --git a/compiler/tests/config_scn4m_subm_front_end.py b/compiler/tests/config_scn4m_subm_front_end.py index 142191a0..5004580e 100644 --- a/compiler/tests/config_scn4m_subm_front_end.py +++ b/compiler/tests/config_scn4m_subm_front_end.py @@ -13,6 +13,8 @@ process_corners = ["TT"] supply_voltages = [5.0] temperatures = [25] +analytical_delay = False + drc_name = "magic" lvs_name = "netgen" pex_name = "magic"