From 1d5e5e3607b3f0af40de3b21d31c3dd4d439bbd5 Mon Sep 17 00:00:00 2001 From: mrg Date: Thu, 2 Apr 2020 12:42:28 -0700 Subject: [PATCH] Don't run lvs/drc or route supplies in verilog test --- compiler/tests/25_verilog_sram_test.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/compiler/tests/25_verilog_sram_test.py b/compiler/tests/25_verilog_sram_test.py index c385e455..bcaa7c9f 100755 --- a/compiler/tests/25_verilog_sram_test.py +++ b/compiler/tests/25_verilog_sram_test.py @@ -19,7 +19,9 @@ class verilog_test(openram_test): def runTest(self): config_file = "{}/tests/configs/config".format(os.getenv("OPENRAM_HOME")) globals.init_openram(config_file) - + OPTS.route_supplies=False + OPTS.check_lvsdrc=False + from sram import sram from sram_config import sram_config c = sram_config(word_size=2,