From 1b53d12df2f29bab0fd50647fea930eb87bfd4d5 Mon Sep 17 00:00:00 2001 From: Jesse Cirimelli-Low Date: Tue, 4 May 2021 01:52:51 -0700 Subject: [PATCH] don't double count spare col --- compiler/modules/bank.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/compiler/modules/bank.py b/compiler/modules/bank.py index 317ebe8f..d1b5a90d 100644 --- a/compiler/modules/bank.py +++ b/compiler/modules/bank.py @@ -388,7 +388,8 @@ class bank(design.design): cols=self.num_cols + self.num_spare_cols, rows=self.num_rows) self.add_mod(self.bitcell_array) - self.num_spare_cols += (self.bitcell_array.column_size % (self.word_size *self.words_per_row)) + if self.num_spare_cols == 0: + self.num_spare_cols = (self.bitcell_array.column_size % (self.word_size *self.words_per_row)) self.port_address = [] for port in self.all_ports: