diff --git a/compiler/sram/sram_base.py b/compiler/sram/sram_base.py
index 3477c2e0..821c75d4 100644
--- a/compiler/sram/sram_base.py
+++ b/compiler/sram/sram_base.py
@@ -324,6 +324,7 @@ class sram_base(design, verilog, lef):
             self.control_logic_r = self.mod_control_logic(num_rows=self.num_rows, 
                                                           words_per_row=self.words_per_row,
                                                           word_size=self.word_size,
+                                                          write_size=self.write_size,
                                                           sram=self,
                                                           port_type="r")
             self.add_mod(self.control_logic_r)