From 1415d139a31cc32d612355f6ad1c85088c7bd64c Mon Sep 17 00:00:00 2001
From: Matt Guthaus <mrg@ucsc.edu>
Date: Fri, 2 Feb 2018 15:33:35 -0800
Subject: [PATCH] Specify file format for sp spice extension.

---
 compiler/verify/magic.py | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/compiler/verify/magic.py b/compiler/verify/magic.py
index 6bfa877e..d83f5b56 100644
--- a/compiler/verify/magic.py
+++ b/compiler/verify/magic.py
@@ -44,8 +44,8 @@ EOF
 3. netgen can perform LVS with:
 #!/bin/sh
 netgen -noconsole <<EOF
-readnet $1.spice
-readnet $1.sp
+readnet spice $1.spice
+readnet spice $1.sp
 ignore class c
 equate class {$1.spice nfet} {$2.sp n}
 equate class {$1.spice pfet} {$2.sp p}
@@ -113,8 +113,8 @@ def write_netgen_script(cell_name, sp_name):
     f = open(run_file, "w")
     f.write("#!/bin/sh\n")
     f.write("{} -noconsole << EOF\n".format(OPTS.lvs_exe[1]))
-    f.write("readnet {}.spice\n".format(cell_name))
-    f.write("readnet {}\n".format(sp_name))
+    f.write("readnet spice {}.spice\n".format(cell_name))
+    f.write("readnet spice {}\n".format(sp_name))
     f.write("ignore class c\n")
     f.write("permute transistors\n")
     f.write("equate class {{{0}.spice nfet}} {{{1} n}}\n".format(cell_name, sp_name))