diff --git a/compiler/router/router.py b/compiler/router/router.py
index a7c4907f..c1d4e763 100644
--- a/compiler/router/router.py
+++ b/compiler/router/router.py
@@ -56,7 +56,7 @@ class router:
         self.blocked_grids = set()
         # The corresponding set of partially blocked grids for each component.
         # These are blockages for other nets but unblocked for this component.
-        self.pin_component_blockages = {}        
+        #self.pin_component_blockages = {}        
         
         ### The routed data structures
         # A list of paths that have been "routed"
@@ -233,8 +233,8 @@ class router:
             self.set_blockages(self.pin_components[name],True)
 
         # Block all of the pin component partial blockages 
-        for name in self.pin_component_blockages.keys():
-            self.set_blockages(self.pin_component_blockages[name],True)
+        #for name in self.pin_component_blockages.keys():
+        #    self.set_blockages(self.pin_component_blockages[name],True)
                            
         # These are the paths that have already been routed.
         self.set_path_blockages()
@@ -732,10 +732,10 @@ class router:
         except:
             self.pin_components[pin_name] = []
 
-        try:
-            self.pin_component_blockages[pin_name]
-        except:
-            self.pin_component_blockages[pin_name] = []
+        # try:
+        #     self.pin_component_blockages[pin_name]
+        # except:
+        #     self.pin_component_blockages[pin_name] = []
             
         found_pin = False
         for pg in self.pin_groups[pin_name]:
@@ -759,13 +759,13 @@ class router:
             if (len(pin_set) == 0):
                 self.write_debug_gds()
                 debug.error("Unable to find pin on grid.",-1)
-                
+
             # We need to route each of the components, so don't combine the groups
-            self.pin_components[pin_name].append(pin_set)
+            self.pin_components[pin_name].append(pin_set | blockage_set)
 
             # Add all of the blocked grids to the set for the design
-            partial_set = blockage_set - pin_set
-            self.pin_component_blockages[pin_name].append(partial_set)
+            #partial_set = blockage_set - pin_set
+            #self.pin_component_blockages[pin_name].append(partial_set)
 
             # Remove the blockage set from the blockages since these
             # will either be pins or partial pin blockges
@@ -826,8 +826,11 @@ class router:
         # FIXME: This could be optimized, but we just do a simple greedy biggest shape
         # for now.
         for pin_name in self.pin_components.keys():
-            for pin_set,partial_set in zip(self.pin_components[pin_name],self.pin_component_blockages[pin_name]):
-                total_pin_grids = pin_set | partial_set
+            #for pin_set,partial_set in zip(self.pin_components[pin_name],self.pin_component_blockages[pin_name]):
+            #    total_pin_grids = pin_set | partial_set
+            for pin_grids in self.pin_components[pin_name]:
+                # Must duplicate so we don't destroy the original
+                total_pin_grids=set(pin_grids)
                 while self.enclose_pin_grids(total_pin_grids):
                     pass
 
@@ -867,6 +870,13 @@ class router:
         debug.info(1,"Set source: " + str(pin_name) + " " + str(pin_in_tracks))
         self.rg.add_source(pin_in_tracks)
 
+    def add_path_target(self, paths):
+        """ 
+        Set all of the paths as a target too.
+        """
+        for p in paths:
+            self.rg.set_target(p)
+            self.rg.set_blocked(p,False)
 
     def add_pin_component_target(self, pin_name, index):
         """ 
diff --git a/compiler/router/supply_router.py b/compiler/router/supply_router.py
index b14cdb7e..6743bc49 100644
--- a/compiler/router/supply_router.py
+++ b/compiler/router/supply_router.py
@@ -209,7 +209,8 @@ class supply_router(router):
 
         num_components = self.num_pin_components(pin_name)
         debug.info(1,"Pin {0} has {1} components to route.".format(pin_name, num_components))
-        
+
+        recent_paths = []
         # For every component
         for index in range(num_components):
             debug.info(2,"Routing component {0} {1}".format(pin_name, index))
@@ -225,11 +226,12 @@ class supply_router(router):
             # Add all of the rails as targets
             # Don't add the other pins, but we could?
             self.add_supply_rail_target(pin_name)
-            
+
             # Actually run the A* router
             if not self.run_router(detour_scale=5):
                 self.write_debug_gds()
             
+            recent_paths.append(self.paths[-1])
 
                 
     
diff --git a/compiler/router/tests/10_supply_grid_test.py b/compiler/router/tests/10_supply_grid_test.py
index e35544e8..a14e185c 100755
--- a/compiler/router/tests/10_supply_grid_test.py
+++ b/compiler/router/tests/10_supply_grid_test.py
@@ -19,18 +19,19 @@ class no_blockages_test(openram_test):
         globals.init_openram("config_{0}".format(OPTS.tech_name))
         from supply_router import supply_router as router
 
-        if True:
+        if False:
             from control_logic import control_logic
             cell = control_logic(16)
         else:
             from sram import sram
             from sram_config import sram_config
             c = sram_config(word_size=4,
-                            num_words=16,
+                            num_words=32,
                             num_banks=1)
             
             c.words_per_row=1
-            cell = sram(c, "sram1")
+            sram = sram(c, "sram1")
+            cell = sram.s
                 
         layer_stack =("metal3","via3","metal4")
         rtr=router(layer_stack, cell)