diff --git a/compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_pruned.lib b/compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_pruned.lib
index 1cd10b44..a3ec121c 100644
--- a/compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_pruned.lib
+++ b/compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_pruned.lib
@@ -87,16 +87,16 @@ cell (sram_2_16_1_freepdk45){
     cell_leakage_power : 0;
     bus(DIN){
         bus_type  : DATA; 
-        direction  : in; 
-        max_capacitance : 1.6728;  
-        min_capacitance : 0.052275;  
+        direction  : input; 
+        capacitance : 0.2091;  
         memory_write(){ 
             address : ADDR; 
             clocked_on  : clk; 
         }
+    }
     bus(DOUT){
         bus_type  : DATA; 
-        direction  : out; 
+        direction  : output; 
         max_capacitance : 1.6728;  
         min_capacitance : 0.052275;  
         memory_read(){ 
@@ -229,39 +229,6 @@ cell (sram_2_16_1_freepdk45){
         }
     }
 
-    pin(OEb){
-        direction  : input; 
-        capacitance : 0.2091;  
-        timing(){ 
-            timing_type : setup_rising; 
-            related_pin  : "clk"; 
-            rise_constraint(CONSTRAINT_TABLE) {
-            values("0.009, 0.015, 0.027",\
-                   "0.009, 0.015, 0.027",\
-                   "0.009, 0.015, 0.027");
-            }
-            fall_constraint(CONSTRAINT_TABLE) {
-            values("0.009, 0.009, 0.015",\
-                   "0.009, 0.009, 0.015",\
-                   "0.009, 0.009, 0.015");
-            }
-        }
-        timing(){ 
-            timing_type : hold_rising; 
-            related_pin  : "clk"; 
-            rise_constraint(CONSTRAINT_TABLE) {
-            values("0.002, 0.002, -0.004",\
-                   "0.002, 0.002, -0.004",\
-                   "0.002, 0.002, -0.004");
-              }
-            fall_constraint(CONSTRAINT_TABLE) {
-            values("-0.004, -0.004, -0.016",\
-                   "-0.004, -0.004, -0.016",\
-                   "-0.004, -0.004, -0.016");
-            }
-        }
-    }
-
     pin(WEb){
         direction  : input; 
         capacitance : 0.2091;  
diff --git a/compiler/tests/golden/sram_2_16_1_scn3me_subm_TT_5p0V_25C_pruned.lib b/compiler/tests/golden/sram_2_16_1_scn3me_subm_TT_5p0V_25C_pruned.lib
index 39924746..b514a858 100644
--- a/compiler/tests/golden/sram_2_16_1_scn3me_subm_TT_5p0V_25C_pruned.lib
+++ b/compiler/tests/golden/sram_2_16_1_scn3me_subm_TT_5p0V_25C_pruned.lib
@@ -87,16 +87,16 @@ cell (sram_2_16_1_scn3me_subm){
     cell_leakage_power : 0;
     bus(DIN){
         bus_type  : DATA; 
-        direction  : in; 
-        max_capacitance : 78.5936;  
-        min_capacitance : 2.45605;  
+        direction  : input; 
+        capacitance : 9.8242;  
         memory_write(){ 
             address : ADDR; 
             clocked_on  : clk; 
         }
+    }
     bus(DOUT){
         bus_type  : DATA; 
-        direction  : out; 
+        direction  : output; 
         max_capacitance : 78.5936;  
         min_capacitance : 2.45605;  
         memory_read(){ 
@@ -229,39 +229,6 @@ cell (sram_2_16_1_scn3me_subm){
         }
     }
 
-    pin(OEb){
-        direction  : input; 
-        capacitance : 9.8242;  
-        timing(){ 
-            timing_type : setup_rising; 
-            related_pin  : "clk"; 
-            rise_constraint(CONSTRAINT_TABLE) {
-            values("0.076, 0.076, 0.149",\
-                   "0.076, 0.076, 0.149",\
-                   "0.076, 0.076, 0.149");
-            }
-            fall_constraint(CONSTRAINT_TABLE) {
-            values("0.033, 0.039, 0.027",\
-                   "0.033, 0.039, 0.027",\
-                   "0.033, 0.039, 0.027");
-            }
-        }
-        timing(){ 
-            timing_type : hold_rising; 
-            related_pin  : "clk"; 
-            rise_constraint(CONSTRAINT_TABLE) {
-            values("-0.004, -0.004, 0.009",\
-                   "-0.004, -0.004, 0.009",\
-                   "-0.004, -0.004, 0.009");
-              }
-            fall_constraint(CONSTRAINT_TABLE) {
-            values("-0.052, -0.059, -0.132",\
-                   "-0.052, -0.059, -0.132",\
-                   "-0.052, -0.059, -0.132");
-            }
-        }
-    }
-
     pin(WEb){
         direction  : input; 
         capacitance : 9.8242;  
diff --git a/compiler/tests/testutils.py b/compiler/tests/testutils.py
index 6d6567f8..96acc757 100644
--- a/compiler/tests/testutils.py
+++ b/compiler/tests/testutils.py
@@ -183,9 +183,9 @@ class openram_test(unittest.TestCase):
             
             # 4. Check if remaining string matches
             if line1 != line2:
-                #Uncomment if you want to see all the chars of the two lines separated
-                #print(str([i for i in line1]))
-                #print(str([i for i in line2]))
+                #Uncomment if you want to see all the individual chars of the two lines 
+                print(str([i for i in line1]))
+                print(str([i for i in line2]))
                 if mismatches==0:
                     debug.error("Mismatching files:\nfile1={0}\nfile2={1}".format(filename1,filename2))
                 mismatches += 1