From 06232dee8f71a5c8f93392bff2932978762dce96 Mon Sep 17 00:00:00 2001 From: Hunter Nichols Date: Mon, 14 Dec 2020 14:32:10 -0800 Subject: [PATCH] Added leakage and slew data. Added temporary fix to model output format. --- compiler/characterizer/linear_regression.py | 17 ++++++----------- technology/scn4m_subm/sim_data/leakage_data.csv | 9 +++++++++ technology/scn4m_subm/sim_data/slew_data.csv | 9 +++++++++ 3 files changed, 24 insertions(+), 11 deletions(-) create mode 100644 technology/scn4m_subm/sim_data/leakage_data.csv create mode 100644 technology/scn4m_subm/sim_data/slew_data.csv diff --git a/compiler/characterizer/linear_regression.py b/compiler/characterizer/linear_regression.py index 2e02bd7b..65b5c9c9 100644 --- a/compiler/characterizer/linear_regression.py +++ b/compiler/characterizer/linear_regression.py @@ -61,30 +61,25 @@ class linear_regression(simulation): max_delay = 0.0 for slew in slews: for load in loads: - # Calculate delay based on slew and load - debug.info(1, - '{}, {}, {}, {}'.format(slew, - load, - total_delay.delay / 1e3, - total_delay.slew / 1e3)) # Delay is only calculated on a single port and replicated for now. for port in self.all_ports: for mname in self.delay_meas_names + self.power_meas_names: #FIXME: fix magic for indexing the data + #FIXME: model output is double list. Simply this if "power" in mname: - port_data[port][mname].append(sram_vals[1]) + port_data[port][mname].append(sram_vals[1][0][0]) elif "delay" in mname and port in self.read_ports: - port_data[port][mname].append(sram_vals[0]) + port_data[port][mname].append(sram_vals[0][0][0]) elif "slew" in mname and port in self.read_ports: - port_data[port][mname].append(sram_vals[3]) + port_data[port][mname].append(sram_vals[3][0][0]) else: debug.error("Measurement name not recognized: {}".format(mname), 1) # Estimate the period as double the delay with margin period_margin = 0.1 - sram_data = {"min_period": sram_vals[0] * 2, - "leakage_power": sram_vals[2]} + sram_data = {"min_period": sram_vals[0][0][0] * 2, + "leakage_power": sram_vals[2][0][0]} debug.info(2, "SRAM Data:\n{}".format(sram_data)) debug.info(2, "Port Data:\n{}".format(port_data)) diff --git a/technology/scn4m_subm/sim_data/leakage_data.csv b/technology/scn4m_subm/sim_data/leakage_data.csv new file mode 100644 index 00000000..f3e8afd3 --- /dev/null +++ b/technology/scn4m_subm/sim_data/leakage_data.csv @@ -0,0 +1,9 @@ +num_words,word_size,words_per_row,area,leakage_power +16,2,1,88873,0.0009381791 +64,2,4,108116,0.0011511999999999998 +16,1,1,86004,0.0005252088 +32,3,2,101618,0.0012168 +32,2,2,95878,0.000771978 +16,3,1,93009,0.0009978024 +64,1,4,95878,0.0006975546000000001 +32,1,2,90139,0.0006437493 diff --git a/technology/scn4m_subm/sim_data/slew_data.csv b/technology/scn4m_subm/sim_data/slew_data.csv new file mode 100644 index 00000000..7bf1cbf9 --- /dev/null +++ b/technology/scn4m_subm/sim_data/slew_data.csv @@ -0,0 +1,9 @@ +num_words,word_size,words_per_row,area,output_slew +16,2,1,88873,1.81 +64,2,4,108116,1.69 +16,1,1,86004,1.786 +32,3,2,101618,1.725 +32,2,2,95878,1.71 +16,3,1,93009,1.835 +64,1,4,95878,1.662 +32,1,2,90139,1.69