mirror of https://github.com/VLSIDA/OpenRAM.git
34 lines
676 B
Makefile
34 lines
676 B
Makefile
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CUR_DIR = $(shell pwd)
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TEST_DIR = ${CUR_DIR}/tests
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#MAKEFLAGS += -j 2
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CONFIG_DIR = configs
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OUT_DIRS = sp lib lef gds verilog
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$(shell mkdir -p $(OUT_DIRS))
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SRCS=$(wildcard $(CONFIG_DIR)/*.py)
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SPICES=$(SRCS:.py=.sp)
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all : $(SPICES)
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OPTS =
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# Characterize and perform DRC/LVS
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#OPTS = -c
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# Do not characterize or perform DRC/LVS
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#OPTS += -n
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# Verbosity
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OPTS += -v
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%.sp : %.py
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$(eval bname=$(basename $(notdir $<)))
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openram.py $(OPTS) $< 2>&1 > $(bname).log
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mv $(bname).lef lef
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mv $(bname).v verilog
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mv $(bname).sp sp
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mv $(bname).gds gds
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mv $(bname)*.lib lib
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clean:
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rm -f *.log configs/*.pyc *~ *.gds *.lib *.sp *.v *.lef
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rm -f gds/* lef/* lib/* sp/* verilog/*
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