From c7b704251594fba8c4cc896db58b6f536da91535 Mon Sep 17 00:00:00 2001 From: Clyde Laforge Date: Thu, 26 Feb 2026 13:45:08 +0000 Subject: [PATCH] SAC_ADC comparator readme typos --- modules/module_3_8_bit_SAR_ADC/part_1_comparator/README.md | 1 - 1 file changed, 1 deletion(-) diff --git a/modules/module_3_8_bit_SAR_ADC/part_1_comparator/README.md b/modules/module_3_8_bit_SAR_ADC/part_1_comparator/README.md index 0376a80e..ec9e71e1 100644 --- a/modules/module_3_8_bit_SAR_ADC/part_1_comparator/README.md +++ b/modules/module_3_8_bit_SAR_ADC/part_1_comparator/README.md @@ -159,7 +159,6 @@ As you can see, this setup closely resembles the testbench used for the simple t ``` name=V2 value="PULSE(595e-3 605e-3 0 tr 1S 1S)" - ``` Looking at the model includes, we see that now have defined the mismatch model