diff --git a/utils/PEX_Demo/pex/kpex.sh b/utils/PEX_Demo/pex/kpex.sh
new file mode 100755
index 00000000..c332b811
--- /dev/null
+++ b/utils/PEX_Demo/pex/kpex.sh
@@ -0,0 +1,27 @@
+#!/bin/bash
+set -e
+
+# Hardcoded paths (except PDK stuff)
+
+LAYOUT_PATH="../layout/inverter.gds"
+SCHEMATIC="../simulations/inverter.spice"
+
+
+PDK_NAME="ihp_sg13g2"
+MAGICRC="$PDK_ROOT/$PDK/libs.tech/magic/ihp-sg13g2.magicrc" # The magicrc file for your PDK, used during extraction
+
+
+# Run parasitic extraction with kpex
+kpex \
+  --pdk "$PDK_NAME" \
+  --magic \
+  --schematic "$SCHEMATIC" \
+  --gds "$LAYOUT_PATH" \
+  --magicrc "$MAGICRC" \
+  --magic_mode RC \
+  --magic_cthresh 0.02 \
+  --magic_rthresh 50 \
+  --magic_short resistor \
+  --magic_merge conservative \
+  --out_dir ./pex_output
+
diff --git a/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.ext b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.ext
new file mode 100644
index 00000000..85ef5539
--- /dev/null
+++ b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.ext
@@ -0,0 +1,23 @@
+timestamp 0
+version 8.3
+tech ihp-sg13g2
+style ngspice()
+scale 1000 1 0.5
+resistclasses 3000000 67000 110 88 88 88 88 18 11
+parameters sg13_lv_nmos l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sg13_lv_pmos l=l w=w a1=as p1=ps a2=ad p2=pd
+port "Vout" 2 266 -211 298 -173 m1
+port "Vin" 3 95 -213 127 -175 m1
+port "Vdd" 5 -205 318 -173 356 m1
+port "Gnd" 4 20 -732 52 -694 m1
+node "ptap1_0.sub!" 0 0 28 -796 isosub 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "Vout" 1 392.446 266 -211 m1 0 0 0 0 91916 2354 0 0 0 0 0 0 0 0 0 0 0 0
+node "Vin" 0 646.659 95 -213 m1 0 0 0 0 13590 482 0 0 0 0 0 0 0 0 0 0 0 0
+node "Vdd" 1 153.076 -205 318 m1 0 0 0 0 42800 1364 0 0 0 0 0 0 0 0 0 0 0 0
+equiv "Vdd" "ntap1_0.well"
+substrate "Gnd" 0 0 20 -732 m1 0 0 0 0 21536 1036 0 0 0 0 0 0 0 0 0 0 0 0
+cap "Vout" "Vdd" 131.55
+cap "Vout" "Vin" 100.772
+cap "Vin" "Vdd" 144.819
+device msubckt sg13_lv_nmos 67 -562 68 -561 l=90 w=200 "Gnd" "Vin" 180 0 "Gnd" 200 13600,536 "Vout" 200 13600,536
+device msubckt sg13_lv_pmos 67 9 68 10 l=90 w=400 "Vdd" "Vin" 180 0 "Vdd" 400 27200,936 "Vout" 400 27200,936
diff --git a/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.res.ext b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.res.ext
new file mode 100644
index 00000000..086c80d3
--- /dev/null
+++ b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.res.ext
@@ -0,0 +1 @@
+scale 1000 1 0.5
diff --git a/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter_MAGIC_RC_Script.tcl b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter_MAGIC_RC_Script.tcl
new file mode 100644
index 00000000..54be41a3
--- /dev/null
+++ b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter_MAGIC_RC_Script.tcl
@@ -0,0 +1,25 @@
+# Generated by kpex 0.3.6
+crashbackups stop
+drc off
+gds read /home/pedersen/projects/IHP-AnalogAcademy/utils/PEX_Demo/layout/inverter.gds
+load inverter
+select top cell
+flatten inverter_flat
+load inverter_flat
+cellname delete inverter -noprompt
+cellname rename inverter_flat inverter
+select top cell
+extract path /home/pedersen/projects/IHP-AnalogAcademy/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC
+extract all
+ext2sim labels on
+ext2sim
+extresist tolerance 1
+extresist all
+ext2spice short resistor
+ext2spice merge conservative
+ext2spice cthresh 0.02
+ext2spice extresist on
+ext2spice subcircuits top on
+ext2spice format ngspice
+ext2spice -p /home/pedersen/projects/IHP-AnalogAcademy/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC -o /home/pedersen/projects/IHP-AnalogAcademy/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter.pex.spice
+quit -noprompt
diff --git a/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter_MAGIC_report.rdb.gz b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter_MAGIC_report.rdb.gz
new file mode 100644
index 00000000..01007d71
Binary files /dev/null and b/utils/PEX_Demo/pex/pex_output/inverter__inverter/magic_RC/inverter_MAGIC_report.rdb.gz differ
diff --git a/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.ext b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.ext
new file mode 100644
index 00000000..7c84aff7
--- /dev/null
+++ b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.ext
@@ -0,0 +1,24 @@
+timestamp 0
+version 8.3
+tech ihp-sg13g2
+style ngspice()
+scale 1000 1 0.5
+resistclasses 3000000 67000 110 88 88 88 88 18 11
+parameters sg13_lv_nmos l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sg13_lv_pmos l=l w=w a1=as p1=ps a2=ad p2=pd
+port "Vout" 3 266 -211 298 -173 m1
+port "Vin" 4 95 -213 127 -175 m1
+port "Vdd" 6 -237 285 -137 405 m1
+port "well" 2 -265 267 -109 423 nw
+port "Gnd" 5 -22 -770 78 -670 m1
+node "sub!" 0 0 28 -796 isosub 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "Vout" 1 392.446 266 -211 m1 0 0 0 0 91916 2354 0 0 0 0 0 0 0 0 0 0 0 0
+node "Vin" 0 646.659 95 -213 m1 0 0 0 0 13590 482 0 0 0 0 0 0 0 0 0 0 0 0
+node "Vdd" 1 153.076 -237 285 m1 0 0 0 0 42800 1364 0 0 0 0 0 0 0 0 0 0 0 0
+equiv "Vdd" "well"
+substrate "Gnd" 0 0 -22 -770 m1 0 0 0 0 21536 1036 0 0 0 0 0 0 0 0 0 0 0 0
+cap "Vout" "Vdd" 131.55
+cap "Vout" "Vin" 100.772
+cap "Vdd" "Vin" 144.819
+device msubckt sg13_lv_nmos 67 -562 68 -561 l=90 w=200 "Gnd" "Vin" 180 0 "Gnd" 200 13600,536 "Vout" 200 13600,536
+device msubckt sg13_lv_pmos 67 9 68 10 l=90 w=400 "Vdd" "Vin" 180 0 "Vdd" 400 27200,936 "Vout" 400 27200,936
diff --git a/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.res.ext b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.res.ext
new file mode 100644
index 00000000..7e5187e5
--- /dev/null
+++ b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.res.ext
@@ -0,0 +1,28 @@
+scale 1000 1 0.5
+rnode "well" 0 0 -265 267 0
+rnode "Vdd" 0 -0 -237 285 0
+resist "Vdd" "well" 8.53119
+rnode "Gnd.t1" 0 0 29 -462 0
+rnode "Gnd.t0" 0 0 112 -462 0
+rnode "Gnd.n0" 0 0 62 -754 0
+rnode "Gnd" 0 0 -22 -770 0
+resist "Gnd" "Gnd.n0" 0.055709
+resist "Gnd.n0" "Gnd.t1" 6.307
+resist "Gnd.n0" "Gnd.t0" 1079.19
+rnode "Vout.t1" 0 0 195 311 0
+rnode "Vout.t0" 0 0 195 -462 0
+rnode "Vout" 0 0 266 -211 0
+resist "Vout" "Vout.t1" 3.28762
+resist "Vout" "Vout.t0" 6.19274
+rnode "Vdd" 0 0 -237 285 0
+rnode "Vdd.t0" 0 0 29 379 0
+rnode "Vdd.n0" 0 0 -153 379 0
+rnode "well" 0 0 112 209 0
+resist "Vdd.n0" "Vdd" 0.0465926
+resist "Vdd.n0" "Vdd.t0" 3.18546
+resist "well" "Vdd.n0" 8.48516
+rnode "Vin.t0" 0 0 111 -158 0
+rnode "Vin" 0 0 95 -213 0
+resist "Vin" "Vin.t0" 7.52198
+device msubckt sg13_lv_nmos 67 -562 68 -561  "Gnd.t0" "Vin.t0" 180 0 "Gnd.t1" 200 13600,536 "Vout.t0" 200 13600,536
+device msubckt sg13_lv_pmos 67 9 68 10  "well" "Vin.t0" 180 0 "Vdd.t0" 400 27200,936 "Vout.t1" 400 27200,936
diff --git a/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter_MAGIC_RC_Script.tcl b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter_MAGIC_RC_Script.tcl
new file mode 100644
index 00000000..4e277c56
--- /dev/null
+++ b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter_MAGIC_RC_Script.tcl
@@ -0,0 +1,25 @@
+# Generated by kpex 0.3.7
+crashbackups stop
+drc off
+gds read /home/pedersen/misc/inverter_example/layout/inverter_flat.gds
+load inverter
+select top cell
+flatten inverter_flat
+load inverter_flat
+cellname delete inverter -noprompt
+cellname rename inverter_flat inverter
+select top cell
+extract path /home/pedersen/misc/inverter_example/pex/pex_output/inverter_flat__inverter/magic_RC
+extract all
+ext2sim labels on
+ext2sim -p /home/pedersen/misc/inverter_example/pex/pex_output/inverter_flat__inverter/magic_RC
+extresist tolerance 1
+extresist all
+ext2spice short resistor
+ext2spice merge conservative
+ext2spice cthresh 0.02
+ext2spice extresist on
+ext2spice subcircuits top on
+ext2spice format ngspice
+ext2spice -p /home/pedersen/misc/inverter_example/pex/pex_output/inverter_flat__inverter/magic_RC -o /home/pedersen/misc/inverter_example/pex/pex_output/inverter_flat__inverter/magic_RC/inverter.pex.spice
+quit -noprompt
diff --git a/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter_MAGIC_report.rdb.gz b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter_MAGIC_report.rdb.gz
new file mode 100644
index 00000000..9e99b475
Binary files /dev/null and b/utils/PEX_Demo/pex/pex_output/inverter_flat__inverter/magic_RC/inverter_MAGIC_report.rdb.gz differ