diff --git a/modules/module_0_foundations/PEX_Demo/invert_test.sch b/modules/module_0_foundations/PEX_Demo/inverter_test.sch
similarity index 100%
rename from modules/module_0_foundations/PEX_Demo/invert_test.sch
rename to modules/module_0_foundations/PEX_Demo/inverter_test.sch
diff --git a/modules/module_0_foundations/inverter/inverter.sch b/modules/module_0_foundations/inverter/inverter.sch
deleted file mode 100644
index 72ee61b0..00000000
--- a/modules/module_0_foundations/inverter/inverter.sch
+++ /dev/null
@@ -1,34 +0,0 @@
-v {xschem version=3.4.6 file_version=1.2}
-G {}
-K {}
-V {}
-S {}
-E {}
-N 410 -190 410 -130 {lab=Gnd}
-N 410 -340 410 -280 {lab=Vdd}
-N 330 -280 370 -280 {lab=Vin}
-N 330 -280 330 -190 {lab=Vin}
-N 330 -190 370 -190 {lab=Vin}
-N 410 -230 490 -230 {lab=Vout}
-N 410 -230 410 -220 {lab=Vout}
-N 410 -250 410 -230 {lab=Vout}
-C {sg13g2_pr/sg13_lv_nmos.sym} 390 -190 2 1 {name=M1
-l=0.45u
-w=1.0u
-ng=1
-m=1
-model=sg13_lv_nmos
-spiceprefix=X
-}
-C {sg13g2_pr/sg13_lv_pmos.sym} 390 -280 0 0 {name=M2
-l=0.45u
-w=2.0u
-ng=1
-m=1
-model=sg13_lv_pmos
-spiceprefix=X
-}
-C {iopin.sym} 490 -230 2 1 {name=p2 lab=Vout}
-C {iopin.sym} 410 -340 2 0 {name=p5 lab=Vdd}
-C {iopin.sym} 330 -240 2 0 {name=p6 lab=Vin}
-C {iopin.sym} 410 -130 2 1 {name=p1 lab=Gnd}
diff --git a/modules/module_0_foundations/inverter/inverter.sym b/modules/module_0_foundations/inverter/inverter.sym
index 1c467671..9fe2db16 100644
--- a/modules/module_0_foundations/inverter/inverter.sym
+++ b/modules/module_0_foundations/inverter/inverter.sym
@@ -1,11 +1,23 @@
-v {xschem version=3.4.6 file_version=1.2}
+v {xschem version=3.4.8RC file_version=1.3}
 G {}
 K {type=subcircuit
 format="@name @pinlist @symname"
 template="name=x1"
-}
+spice_sym_def="
+.subckt inverter Vout Vin Gnd Vdd                                                                
+X0 Vout Vin Vdd Vdd sg13_lv_pmos ad=0.68p pd=4.68u as=0.68p ps=4.68u w=2u l=0.45u                
+X1 Vout Vin Gnd Gnd sg13_lv_nmos ad=0.34p pd=2.68u as=0.34p ps=2.68u w=1u l=0.45u                
+C0 Vin Vdd 0.14482f                                                                              
+C1 Vout Vin 0.10077f                                                                             
+C2 Vout Vdd 0.13155f                                                                             
+C3 Vout Gnd 0.39245f                                                                             
+C4 Vin Gnd 0.64666f                                                                              
+C5 Vdd Gnd 0.15308f                                                                              
+.ends                                                                                            
+"}
 V {}
 S {}
+F {}
 E {}
 L 7 -70 -80 -70 -60 {}
 L 7 -150 0 -130 0 {}
diff --git a/modules/module_0_foundations/inverter/inverter_tb.sch b/modules/module_0_foundations/inverter/inverter_tb.sch
index 1fbdfbfc..f8a4c814 100644
--- a/modules/module_0_foundations/inverter/inverter_tb.sch
+++ b/modules/module_0_foundations/inverter/inverter_tb.sch
@@ -1,11 +1,12 @@
-v {xschem version=3.4.6 file_version=1.2}
+v {xschem version=3.4.8RC file_version=1.3}
 G {}
 K {}
 V {}
 S {}
+F {}
 E {}
 B 2 710 -550 1510 -150 {flags=graph
-y1=-0.0023
+y1=0
 y2=1.3
 ypos1=0
 ypos2=2
@@ -18,8 +19,9 @@ divx=5
 subdivx=1
 xlabmag=1.0
 ylabmag=1.0
-node=vout
-color=4
+node="vout
+vin"
+color="7 4"
 dataset=-1
 unitx=1
 logx=0
@@ -59,8 +61,8 @@ C {launcher.sym} 770 -120 0 0 {name=h5
 descr="load waves" 
 tclcommand="xschem raw_read $netlist_dir/test_inverter.raw tran"
 }
-C {inverter.sym} 390 -300 0 0 {name=x1}
 C {lab_pin.sym} 220 -300 0 0 {name=p2 sig_type=std_logic lab=Vin}
 C {gnd.sym} 320 -190 0 0 {name=l1 lab=GND}
 C {lab_pin.sym} 320 -410 0 0 {name=p4 sig_type=std_logic lab=Vdd}
 C {lab_pin.sym} 540 -300 0 1 {name=p5 sig_type=std_logic lab=Vout}
+C {inverter.sym} 390 -300 0 0 {name=x1}