From 175894ea7621c2a6f2e2877b9a3249fa10546eeb Mon Sep 17 00:00:00 2001
From: PhillipRambo <93056982+PhillipRambo@users.noreply.github.com>
Date: Tue, 7 Oct 2025 12:45:23 +0200
Subject: [PATCH] Update digital_comps.md

---
 .../part_2_digital_comps/digital_comps.md                       | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/modules/module_3_8_bit_SAR_ADC/part_2_digital_comps/digital_comps.md b/modules/module_3_8_bit_SAR_ADC/part_2_digital_comps/digital_comps.md
index 930202ab..468dbfb8 100644
--- a/modules/module_3_8_bit_SAR_ADC/part_2_digital_comps/digital_comps.md
+++ b/modules/module_3_8_bit_SAR_ADC/part_2_digital_comps/digital_comps.md
@@ -308,7 +308,6 @@ You are encouraged to experiment with the input signals, change timings, and ver
 
 ## Bootstrap - Switch
 
-Explain the function of bootstrap switch
 
 In this design the bootstrap switch that was used is a modification of the one seen below:
 <p align="center"> 
@@ -502,3 +501,4 @@ After simulation, the results should resemble the following:
 </p>
 
 As observed, when the control signal is high, the output is grounded; when low, it passes Vref.
+